Parallel Computing: Why Parallelism? Why Efficiency? (CS149)
Challenges of parallelizing code, motivations for parallel chips, processor basics.
Cadence Design Systems Professor at Stanford & IEEE Eckert-Mauchly Award
Stanford Professor of Electrical Engineering and Computer Science who pioneered chip multiprocessors (multi-core CPUs) and domain-specific hardware accelerators.
Self-contained public lectures, keynote addresses, and research seminars.
Challenges of parallelizing code, motivations for parallel chips, processor basics.