1. Introduction and Matrix Multiplication
1:00:202. Bentley Rules for Optimizing Work
1:20:103. Bit Hacks
1:18:544. Assembly Language & Computer Architecture
1:17:345. C to Assembly
1:21:306. Multicore Programming
1:16:467. Races and Parallelism
1:14:398. Analysis of Multithreaded Algorithms
1:17:34Lecture 9: What Compilers Can and Cannot Do (6.172)
1:18:46Lecture 10: Measurement and Timing (6.172)
1:21:28Lecture 11: Storage Allocation (6.172)
1:05:26Lecture 12: Parallel Storage Allocation (6.172)
1:17:21Lecture 13: The Cilk Runtime System (6.172)
1:21:47Lecture 14: Caching and Cache-Efficient Algorithms (6.172)
1:18:23Lecture 15: Cache-Oblivious Algorithms (6.172)
1:21:47Lecture 16: Nondeterministic Parallel Programming (6.172)
1:22:12Lecture 17: Synchronization Without Locks (6.172)
1:20:10Lecture 18: Domain Specific Languages and Autotuning (6.172)
1:11:22Lecture 20: Speculative Parallelism & Leiserchess (6.172)
1:23:03Lecture 21: Tuning a TSP Algorithm (6.172)
1:20:53Lecture 22: Graph Optimization (6.172)
1:18:404. Assembly Language & Computer Architecture
Professors of Electrical Engineering and Computer Science
This lecture delineates the entire software-to-hardware execution pipeline, from high-level source code through compilation to machine code, and its interpretation by the underlying computer architecture, including the instruction set. Professor Leiserson elaborates on the interactions between compilers and processor design.
MIT 6.172 Performance Engineering of Software Systems, Fall 2018
Instructor: Charles Leiserson
View the complete course: https://ocw.mit.edu/6-172F18
YouTube Playlist: https://www.youtube.com/playlist?list=PLUl4u3cNGP63VIBQVWguXxZZi0566y7Wf
Seminar notes & discussion
No public seminar notes on this lecture yet.